Imprecise data bus fault (IMPRECISERR) on Cortex-M
IMPRECISERR (CFSR bit 10) is the most frustrating Cortex-M fault: the write buffer completed your instruction before the bus error came back, so the stacked PC is NOT the instruction that caused it.
Why the PC is wrong
Cortex-M cores buffer writes. A bad write can fault several instructions later, so by the time the BusFault is raised the PC has moved on. BFAR is usually not valid for imprecise faults.
Make it precise
Disable write buffering temporarily by setting DISDEFWBUF (bit 1) in the ACTLR register (0xE000E008). The fault then becomes precise — the stacked PC points at the real faulting store, and BFAR becomes valid.
Common causes
Writing to an invalid/unmapped peripheral address, a DMA buffer overrun, or accessing a peripheral whose clock is not enabled.